Senior ASIC Timing Engineer
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![]() United States, Michigan, Ann Arbor | |
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The application window is expected to close on 8/25/25. Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. Meet the TeamJoin our team at Acacia, where we design advanced optical transceivers for high-speed fiber optic transmission in data centers and telecommunication networks. This team is developing next generation 100G-1T coherent optical communications products. Your ImpactThis is a senior contributor role focused on delivering highly-complex ASICS in advanced technology nodes that are used in next generation telecom systems. The role involves detailed running timing analysis and driving timing closure at the full-chip level. This includes providing ECO scripts and guidance to designers for delivering tape-out quality for all parts of the design, in a highly team focused environment.
Why Cisco? At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Simply put - we power the future. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. |