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New

DDR / Memory PHY Post Silicon Validation Engineer

Advanced Micro Devices, Inc.
$171,200.00/Yr.-$256,800.00/Yr.
United States, Texas, Austin
7171 Southwest Parkway (Show on map)
Aug 22, 2025


WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.

AMD together we advance_

THE ROLE:

As a member of the IO and Circuit Technologies Group, you will help bring to life cutting-edge designs.As a member of the High-Speed IO Interface IP engineering team, you will be part of the Memory sub-team working closely with Architecture, IP design, Physical Design, SoC, Platform, Product, and other engineering teams to productize best-in-class HBM (high bandwidth memory)/DDR/LPDDR memory interface IP's on silicon.

THE PERSON:

A successful candidate will work with senior silicon design engineers and leaders. The candidate will be highly technical and detail-oriented, possessing good communication, Strong analytical and problem-solving skills involving post-silicon debug and pre-silicon issues.

KEY RESPONSIBILITIES:

  • Provide systems engineering and post-silicon support for HBM/DDR/LPDDR Memory interface IP.
  • New products bring-up support from first silicon in the lab through initial production.
  • Triage observations from silicon validation, and help debug issues with ATE, Platform, Firmware, and Characterization / Compliance teams.
  • Provide expertise and support in silicon design, process, and integration flows for Memory Interface IP
  • Pre-Silicon engagement with internal and external PHY design teams, Platform, ATE, IP design, and Firmware teams.
  • Perform and review analog circuit and mixed-signal design/analysis for high-speed I/O and Memory Interface IP in advanced process technologies.

PREFERRED EXPERIENCE:

  • High-speed I/O design experience, including understanding of Tx (transceiver), Rx (Receiver), PLL (phase lock loop)/DLL, Clocking, Equalization techniques and circuits, Training algorithms and Firmware
  • Python and/or Perl programming for test scripts, data analysis, FW code creation/debug.
  • Should be familiar with UNIX and Windows environment
  • Ability to adapt learn new toolsets and frameworks,
  • Basic understanding of Verilog RTL, digital circuits, as well as a general knowledge and experience of the backend physical flow
  • Laboratory experience, including hands-on use of equipment: Oscilloscopes, Signal generators, BERT, Logic analyzers, etc.

ACADEMIC CREDENTIALS:

  • Bachelors or Masters degree in Computer engineering/Electrical Engineering

LOCATION: Austin, TX

#LI-TB2

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

Applied = 0

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