Senior Verification Engineer

• Perform pre-silicon verification for complex IP, including creatingtestplans, developing Universal Verification Methodology (UVM) components and environments from scratch, writing test cases, debugging failures to root cause issues,runningandmaintainingregression suites, and closing coverage.
• Interact with architects and design engineers to createtestplanscovering verification strategy, test requirements, and test environments for IP/SS/SOC level verification.
• Define verification strategy, requirements, test environments for IP/SS/SOC level verification.
• Create test-plans and write tests to provide complete features coverage.
• Develop and implement technical solutions to complex quality and design challenges.
• Develop verification components like scoreboards, sequences, constraints,assertionsand functional coverage.
• Triage and debug testbench, simulation, and emulation fails.
• DevelopMakefilesand scripts for verification infrastructure.
• Apply Agile development methodologies including code reviews, sprint planning, and frequent deployment.
• Collaborate with teams across sites and geographies.

Required/minimum qualifications

• Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience.

Other Requirements:

• Abilityto meet Microsoft,customerand/or government security screening requirementsarerequiredfor this role. These requirements include, but are not limited to, the following specialized security screenings: Microsoft Cloud Background Check: This position will berequiredto pass the Microsoft Cloud background check upon hire/transfer and every two years thereafter.

• This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations.As a condition of employment, the successful candidate willbe requiredto provide either proof of their country of citizenship or proof of their US. residency or other protected status(e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information.To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.

Preferred Qualifications

• In depth knowledge of verification principles, testbenches, stimulusgeneration.
• Substantial background in creating simulation environments, developingtestsordebugging designs
• Solid understanding of chip and/or computer architecture
• Experience writing tests in C/C++or UVM
• Proficiencyin scripting languagessuch as Python, Ruby, or Perl
• VerificationwithUVM based test environments
• Experience in debugging Subsystems/SOCs scenarios withembedded processors
• Experience with secure hardware design for embedded systems
• Experience with hardware emulation or FPGAs
• RTL design for FPGA or emulation experience
• Experience in Assembly,start upcode and linker scripts
• Experience in developingmakefilesfor software development

Silicon Engineering IC4 - The typical base pay range for this role across the U.S. is USD $119,800 - $234,700 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $158,400 - $258,000 per year.

Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:
https://careers.microsoft.com/us/en/us-corporate-pay

This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.

Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.